1. Field of the Invention
The present invention relates to a substrate for a liquid crystal display used for a display section of an information apparatus, a liquid crystal display having the same, and a method of manufacturing the same.
2. Description of the Related Art
Recently, liquid crystal displays belonging to classes ranging from XGA (extended graphics array having a resolution of 1024×768) to UXGA (Ultra XGA having a resolution of 1600×1200) and having diagonal dimensions in the range from 15 to 23 inches are spreading for use in desktop PCs (personal computers). This is accelerating the increase of demands for active matrix liquid crystal displays that have a switching element at each pixel. An active matrix liquid crystal display has a display characteristic higher than that of a simple matrix type liquid crystal display in that the occurrence of crosstalk is prevented by providing each pixel with a switching element that is turned off to cut off a tone signal when the pixel is not selected. In particular, a liquid crystal display utilizing thin film transistors (TFTs) as switching elements has a display characteristic equivalent to that of a CRT (cathode-ray tube) in terms of driving capability.
A general TN (twisted nematic) mode liquid crystal display has a structure in which a liquid crystal is sealed between two transparent substrates. A common electrode, color filter (CF) layers and an alignment film are formed on a surface of one of the transparent substrates opposite to the other substrate (opposite surface). TFTs, pixel electrodes and an alignment film are formed on the opposite surface of the other transparent substrate. A polarizer is applied to a surface of each transparent substrate facing oppositely to the opposite surface thereof. When the two polarizers are provided such that their polarization axes are orthogonal to each other, they enable a mode in which light is transmitted when no voltage is applied between the substrates and in which light is blocked when a voltage is applied between the substrates, i.e., a normally white mode. Conversely, when the two polarizers are provided such that their polarization axes are in parallel with each other, a normally black mode is enabled.
Recently, there are demands for liquid crystal displays having higher performance. The spread of portable telephones, portable electronic apparatus and notebook type PCs has resulted in strong demands for a reduction in power consumption, ease of outdoor use, and outdoor visibility. There are demands for development of reflective liquid crystal displays that have light-reflecting pixel electrodes and utilize external light to eliminate a need for a light source device on an assumption that they will be satisfactory in terms of the reduction of power consumption, ease of outdoor use and outdoor visibility.
A TFT substrate of a reflective liquid crystal display is formed with pixel electrodes (reflective electrodes) constituted by a metal thin film having a high reflectivity. In the reflective liquid crystal display, natural light or electrical light (light generated using electricity) that has entered from a display screen side is reflected on the TFT substrate, and the reflected light is used as a light source for liquid crystal display. The reflective electrodes have an irregular surface. The irregular surface of the reflective electrodes is provided by forming a photosensitive resin film having recesses and projections on a surface thereof under the same in advance. Light that has entered from the display screen side is irregularly reflected by the irregular surface of the reflective electrodes, which prevents any significant change in visibility even if there is a change in a position where the display screen is viewed (an angle to the display screen). This makes it possible to provide a reflective liquid crystal display having high luminance and a wide viewing angle.
JP-A-2001-194677 (herein after referred to as “Article 1”) has disclosed a liquid crystal display in which an irregular resist layer is formed under reflective electrodes to form recesses and projections on a surface of the reflective electrodes that are made of aluminum (Al). The irregular resist layer is formed directly on TFTs. This results in a problem in that the TFTs can be subjected to organic contamination attributable to the resist and HMDS (hexamethyldisilazane) that is used in a process of making the substrate hydrophobic before the resist is applied. Further, since the step of forming the resist layer is a wet type process, a problem arises in that moisture and chemical scan penetrate into the TFTs. Therefore, there is a need for forming an anti-contamination protective film on the TFTs to prevent degradation of the characteristics of the TFTS, although not mentioned in Article 1.
In the liquid crystal display disclosed in Article 1, the irregular resist layer is not formed on a terminal section. Therefore, when the terminal section is constituted by an aluminum type multi-layer metal film, a problem arises in that it can be corroded when the resist layer is developed. A description will follow based on the description in Article 1 and with reference to FIGS. 49 to 64 on a substrate for a liquid crystal display and a method of manufacturing the same according to the related art in which the above-described problems are solved.
FIG. 49 shows a configuration of a TFT substrate of a reflective liquid crystal display according to the related art. FIG. 50A shows a section of the TFT substrate taken along the line X—X in FIG. 49, and FIG. 50B shows a section of the TFT substrate taken along the line Y—Y in FIG. 49. FIG. 50C shows a section of the TFT substrate taken along the line Z—Z in FIG. 49. As shown in FIG. 49 and FIGS. 50A to 50C, the TFT substrate has a plurality of gate bus lines 112 formed on a glass substrate 110 such that they extend in the horizontal direction in FIG. 49 in parallel with each other. A plurality of drain bus lines 114 are formed such that they extend in the vertical direction in FIG. 49 in parallel with each other and such that they intersect the gate bus lines 112 with an insulation film (gate insulation film) 122 formed on the gate bus lines 112 interposed therebetween.
TFTs 120 are formed in the vicinity of positions where the gate bus lines 112 and the drain bus lines 114 intersect. An active semiconductor layer 124 made of amorphous silicon (a-Si), a channel protection film 125 and an n-type impurity semiconductor layer 126 made of n+a-Si are formed in the order listed on the gate electrode (gate bus line) 112 of a TFT 120 with the insulation film 122 interposed. A drain electrode 128 that is extended from the drain bus line 114 and a source electrode 130 are formed on the n-type impurity semiconductor layer 126. Electrical isolation is achieved between the drain electrode 128 and the n-type impurity semiconductor layer 126 under the same and between the source electrode 130 and the n-type impurity semiconductor layer 126 under the same. A protective film 136 is formed on the drain electrode 128 and the source electrode 130. A resist layer 152 having an irregular surface is formed on the protective film 136.
Reflective electrodes 116 made of a light-reflecting material such as Al are formed in pixel regions that are provided in the form of a matrix on the TFT substrate. The reflective electrodes 116 are formed with an irregular configuration that follows the surface configuration of the resist layer 152. The reflective electrodes 116 are electrically connected to the source electrodes 130 through contact holes 138. A storage capacitor bus line 118 is formed such that it extends across each pixel region substantially in parallel with the gate bus lines 112. A storage capacitor electrode (intermediate electrode) 132 is formed in each pixel region above the storage capacitor bus line 118 with the insulation film 122 interposed therebetween. The reflective electrodes 116 are electrically connected to the storage capacitor electrodes 132 through contact holes 139.
Gate bus line terminals 140 are formed at one end (on the left side of FIG. 49) of the gate bus lines 112. Protective conductive films 141 made of the same material as that of the reflective electrodes 116 are formed on the gate bus line terminals 140. The protective conductive films 141 are electrically connected to the gate bus line terminals 140 through contact holes 142. Drain bus line terminals 144 are formed at one end (at the top of FIG. 49) of the drain bus lines 114. Protective conductive films 145 made of the same material as that of the reflective electrodes 116 are formed on the drain bus line terminals 144. The protective conductive films 145 are electrically connected to the drain bus line terminals 144 through contact holes 146. Storage capacitor bus line terminals 148 are formed at one end (on the left side of FIG. 49) of the storage capacitor bus lines 118. Protective conductive films 149 made of the same material as that of the reflective electrodes 116 are formed on the storage capacitor bus line terminals 148. The protective conductive films 149 are electrically connected to the storage capacitor bus line terminals 148 through contact holes 150.
A method of manufacturing a TFT substrate for a reflective liquid crystal display according to the related art will now be described with reference to FIGS. 51 to 64. FIGS. 51, 52, 54, 55, 57, 58, 60, 61A, 63 and 64 are sectional views taken in a process showing steps of manufacturing a TFT substrate according to the related art and showing a section corresponding to that in FIG. 50A. FIG. 61B is a sectional view taken in a process showing a step of manufacturing the TFT substrate according to the related art and showing a section corresponding to that in FIG. 50B. FIG. 61C is a sectional view taken in a process showing a step of manufacturing the TFT substrate according to the related art and showing a section corresponding to that in FIG. 50C. FIGS. 53, 56, 59 and 62 show steps of manufacturing the TFT substrate according to the related art, and they are views of the TFT substrate taken in a direction perpendicular to a surface of the substrate.
As shown in FIG. 51, a metal film 160 is formed throughout a top surface of a glass substrate 110. A resist is applied on the metal film 160 throughout the substrate and is patterned using a first photo-mask to form a resist pattern 161. Next, as shown in FIGS. 52 and 53, etching is performed using the resist pattern 161 as an etching mask to form gate bus lines 112, storage capacitor bus lines 118, gate bus line terminals 140 and storage capacitor bus line terminals 148. The resist pattern 161 is then removed.
Next, as shown in FIG. 54, an insulation film 122, an a-Si layer 124′ and a silicon nitride film (SiN film) 125′ are formed in the order listed throughout the substrate. Next, a positive resist is applied throughout the substrate. Next, back surface exposure is performed at the bottom (at the bottom of FIG. 54) of the glass substrate 110 using the gate bus lines 112 as a mask, and exposure is further performed using a second photo-mask to form a resist pattern 162 on the gate bus lines 112 on a self-alignment basis. Next, as shown in FIGS. 55 and 56, etching is performed using the resist pattern 162 as an etching mask to form channel protection films 125. The resist pattern 162 is then removed.
Next, an n+a-Si layer 126′ and a metal film 128′ are continuously formed as shown in FIG. 57. A resist is then applied on the metal film 128′ throughout the substrate and patterned using a third photo-mask to form a resist pattern 163. Next, as shown in FIGS. 58 and 59, etching is performed using the resist pattern 163 as an etching mask to form each of an active semiconductor layer 124, drain bus lines 114, drain electrodes 128, source electrodes 130, drain bus line terminals 144 and storage capacitor electrodes 132. Thus, TFTs 120 are formed. The resist pattern 163 is then removed.
Next, as shown in FIG. 60, a protective film 136 constituted by a transparent insulation film is formed throughout the substrate. A resist is then applied on the protective film 136 throughout the substrate and patterned using a fourth photo-mask to form a resist pattern 164. Next, as shown in FIGS. 61A to 61C and FIG. 62, etching is performed using the resist pattern 164 as an etching mask to form each of contact holes 138′, 139′, 142′, 146′ and 150′. The resist pattern 164 is then removed.
A positive resist is then applied throughout the substrate. Next, in order to form recesses and projections on the surface, exposure is performed with ultraviolet (UV) light of low illumination using a fifth photo-mask having a plurality of circular light shield sections. Next, exposure is performed with UV light of high illumination using a sixth photo-mask having openings in positions associated with the contact holes 138′, 139′, 142′, 146′ and 150′. When developing is subsequently performed, as shown in FIG. 63, openings are formed in the regions above the contact holes 138′, 139′, 142′, 146′ and 150′ that have been exposed to the UV light of high illumination to form contact holes 138, 139, 142, 146 and 150. On the contrary, in the regions exposed to the UV light of low illumination, the thickness of the resist layer becomes smaller than that in the regions shielded from light with the light shield sections by a predetermined amount. This provides an irregular resist layer 152 that is formed with recesses and projections on a surface thereof.
Next, as shown in FIG. 64, a metal film 116′ made of Al is formed on the irregular resist layer 152 throughout the substrate. Patterning is then performed using a seventh photo-mask to form a reflective electrode 116 in each pixel region, protective conductive films 141 on the gate bus line terminals 140, protective conductive films 149 on the storage capacitor bus line terminals 148 and protective conductive films 145 on the drain bus line terminals 144. The above-described steps complete a TFT substrate as shown in FIG. 49 and FIGS. 50A to 50C.
According to the above method of manufacturing a TFT substrate, the protective film 136 constituted by a SiN film is formed on the TFTs 120 after device isolation, and contact holes 138′, 139′, 142′, 146′ and 150′ are formed in the protective film 136 and the insulation film 122 in advance before the irregular resist layer 152 is formed. According to the above method of manufacturing a TFT substrate, the recesses and projections on the surface of the irregular resist layer 152 are formed using the fifth photo-mask, and the contact holes 138, 139, 142, 146 and 150 are formed using the separate sixth photo-mask. Thus, seven photo-masks are required at the steps for manufacturing a reflective TFT substrate. Therefore, the TFT substrate is manufactured through a greater number of steps compared to those for a transmissive TFT substrate that is normally manufactured using five photo-masks, which problematically results in an increase in the manufacturing cost and a reduction in yield of manufacture.